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IMP706P/R/S/T/J, IMP708R/S/T/J
POWER MANAGEMENT
3/3.3/4.0V P Supervisor Circuits
- - - Lo w suppl y cur r ent Watc hdog timer Br o wnout det ection
Key Features
x Lower power, pin compatible replacements for Maxim MAX706P/R/S/T, MAX708R/S/T - 30% lower supply current:140A vs. 200A x Precision power supply monitor - 2.63V threshold (IMP706P/R, IMP708R) - 2.93V threshold (IMP706S, IMP708S) - 3.08V threshold (IMP706T, IMP708T) - New 4.00V threshold (IMP706J, IMP708J) x Debounced manual reset input x Auxiliary voltage monitor comparator - 1.25V threshold - Battery monitor/auxiliary supply monitor x Watchdog timer (IMP706P/R/S/T/J) - Watchdog can be disabled by floating WDI x 200ms reset time delay x Three reset signal options - Active HIGH: IMP706P - Active LOW: IMP706R/S/T/J - Active HIGH & LOW outputs: IMP708R/S/T/J x DIP, SO and MicroSO packages x Guaranteed RESET assertion to VCC = 1.1V
The IMP706P/R/S/T/J and IMP708R/S/T/J CMOS supervisor circuits monitor power-supply and battery voltage level, and P/C operation. A reset is generated when the supply drops below 2.63V (IMP706P/R, IMP708R), 2.93V (IMP706S, IMP708S), 3.08V (IMP706T, IMP708T) or 4.00 (IMP706J, IMP708J). The family offers several functional options. Each device generates a reset signal during power-up, power-down and during brownout conditions. In addition, the IMP706P/R/S/T/J feature a 1.6 second watchdog timer. The watchdog timer output will trigger a reset if connected to MR. Unlike competitive devices, floating the WDI input pin disables the watchdog timer. The IMP708R/S/T/J have both active-HIGH and active-LOW reset outputs but no watchdog function. The IMP706P has the same pin-out and functions as the IMP706R but has an active-HIGH reset output. A versatile power-fail circuit, useful in checking battery levels and non-5V supplies, has a 1.25V threshold. All devices have a manual reset input. All devices are available in 8-pin DIP, SO and the compact MicroSO packages. The MicroSO package requires 50% less PC board area than the conventional SO package.
Applications
x x x x x x x Computers and controllers CTI applications Embedded controllers Battery operated systems Intelligent instruments Wireless communication systems PDAs and handheld equipment
Block Diagrams
WDI
VCC Timebase 20k Transition Detector Watchdog Timer
WDO
VCC 20k
RESET
MR VCC + + -
RESET Generator
RESET (RESET) IMP706P
MR VCC + + -
2.63V (IMP708R) 2.93V (IMP708S) 3.08V (IMP708T) 4.00V (IMP708J)
RESET Generator
RESET
PFI
2.63V (IMP706P/R) 2.93V (IMP706S) 3.08V (IMP706T) 4.00V (IMP706J) 1.25V
+ - PFO
PFI
1.25V
+ PFO -
IMP706P/R/S/T/J
GND
706P_01.eps
IMP708R/S/T/J
706P_02.eps
GND
(c) 1999 IMP, Inc.
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1
IMP706P/R/S/T/J, IMP708R/S/T/J
Pin Configuration
DIP/SO
MR VCC GND PFI 1 2 3 4 IMP708R/S/T/J 8 7 6 5 RESET RESET NC PFO MR VCC GND PFI 1 2 3 4 IMP706P 8 7 6 5 WDO RESET WDI PFO MR VCC GND PFI 1 2 3 4 IMP706R/S/T/J 8 7 6 5 WDO RESET WDI PFO (RESET) RESET (IMP706P) WDO MR VCC 1 2
MicroSO
8 WDI PFO PFI GND RESET RESET MR VCC 1 2 3 4 IMP708R/S/T/J 8 7 6 5 NC PFO PFI GND 7 IMP706P 3 IMP706R/S/T/J 6 4 5
706P_03.eps
Ordering Information
Part Number
IMP706PCPA IMP706PCSA IMP706PCUA IMP706PEPA IMP706PESA IMP706RCPA IMP706RCSA IMP706RCUA IMP706REPA IMP706RESA IMP706SCPA IMP706SCSA IMP706SCUA IMP706SEPA IMP706SESA IMP706TCPA IMP706TCSA IMP706TCUA IMP706TEPA IMP706TESA IMP706JCPA IMP706JCSA IMP706JCUA IMP706JEPA IMP706JESA IMP708RCPA IMP708RCSA IMP708RCUA IMP708REPA IMP708RESA IMP708SCPA IMP708SCSA IMP708SCUA IMP708SEPA IMP708SESA IMP708TCPA IMP708TCSA IMP708TCUA IMP708TEPA IMP708TESA IMP708JCPA IMP708JCSA IMP708JCUA IMP708JEPA IMP708JESA
Package
8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO 8-Plastic DIP 8-SO 8-MicroSO 8-Plastic DIP 8-SO
Operating Temperature Range
0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C 0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C
Reset Threshold
2.63 2.63 2.63 2.63 2.63 2.63 2.63 2.63 2.63 2.63 2.93 2.93 2.93 2.93 2.93 3.08 3.08 3.08 3.08 3.08 4.00 4.00 4.00 4.00 4.00 2.63 2.63 2.63 2.63 2.63 2.93 2.93 2.93 2.93 2.93 3.08 3.08 3.08 3.08 3.08 4.00 4.00 4.00 4.00 4.00
Reset Polarity
HIGH HIGH HIGH HIGH HIGH LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW Dual: HIGH & LOW
Watchdog Timer
YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES YES NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO NO
(c) 1999 IMP, Inc.
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IMP706P/R/S/T/J, IMP708R/S/T/J
Absolute Maximum Ratings
Pin Terminal Voltage with Respect to Ground VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V All other inputs . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V) Input Current at VCC and GND . . . . . . . . . . 20mA Output Current: All outputs . . . . . . . . . . . . . 20mA Rate of Rise at VCC . . . . . . . . . . . . . . . . . . . . . 100V/s Plastic DIP Power Dissipation . . . . . . . . . . . 700mW (Derate 9mW/C above 70C) SO Power Dissipation . . . . . . . . . . . . . . . . . . 470mW (Derate 5.9mW/C above 70C) MicroSO Power Dissipation . . . . . . . . . . . . . 330mW (Derate 4.1mW/C above 70C) Operating Temperature Range IMP706xE, IMP708xE . . . . . . . . . . . . . . . . . . -40C to +85C IMP706xC, IMP708xC . . . . . . . . . . . . . . . . . . 0C to +70C Storage Temperature Range . . . . . . . . . . . . . . -65C to +160C Lead Temperature Soldering (10 sec) . . . . . . 300C These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods may affect device reliability.
Electrical Characteristics
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (IMP706P, IMP708R), 3.0V to 5.5V (IMP706/8S), 3.15V to 5.5V (IMP706/8T) and 4.1V to 5.5V (IMP706/8J).
Parameter
Operating Voltage Range Supply Current VCC < 3.6V Supply Current VCC < 5.5V RESET Threshold
Symbol
VCC ICC ICC VRT
Conditions
IMP706xC, IMP708xC IMP706xE, IMP708xE IMP706xC, IMP706xE, MR = VCC, WDI Floating IMP708xC, IMP708xE, MR = VCC, WDI Floating IMP706xC, IMP706xE, MR = VCC, WDI Floating IMP708xC, IMP708xE, MR = VCC, WDI Floating P and R devices S devices T devices J devices
Min
1.1 1.2
Typ
Max
5.5 5.5
Units
V A A V
75 50 75 50 2.55 2.85 3.00 3.89 2.63 2.93 3.08 4.00 40
140 140 140 140 2.70 3.00 3.15 4.10
RESET Threshold Hysteresis RESET Pulse Width tRS VCC = 3V (IMP706/8, P/R devices), VCC = 3.3V (IMP706/8, S/T devices) VCC = 4.4V (IMP706/8, J devices) VCC = 5V MR Pulse Width tMR 4.5V < VCC < 5.5V 3.6V < VCC < 4.5V (IMP706/8J devices) VRST (MAX) < VCC < 3.6V (IMP706/8P/R/S/T devices) MR to RESET Out Delay tMD 3.6V < VCC < 4.5V (IMP706/8J devices) VRST(MAX) < VCC < 3.6V (IMP706/8P/R/S/T devices) 4.5V < VCC < 5.5V VRST (MAX) < VCC < 4.5V VRST (MAX) < VCC < 4.5V 4.5V < VCC < 5.5V 4.5V < VCC < 5.5V ISOURCE = 800A, 4.5V < VCC < 5.5V ISINK = 3.2mA, 4.5V < VCC < 5.5V ISOURCE = 500A, VRST (MAX) < VCC < 4.5V ISINK = 1.2mA, VRST (MAX) < VCC < 4.5V ISINK = 50A, VCC = 1.1V (IMP706xC, IMP708xC devices) ISINK = 100A, VCC = 1.2V (IMP706xE, IMP708xE devices)
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mV 280 ms
140
200
200 150 500 750 250 0.7VCC 0.6 2.0 0.8 10 VCC-1.5V 0.4 0.8 VCC 0.3 0.3 0.3 20 40 k V V ns ns
MR Input Threshold
VIH V IL VIH VIL
MR Pull-up Resistor RESET Output Voltage (All R/S/T/J devices)
RP V OH VOL V OH VOL V OL
(c) 1999 IMP, Inc.
3
IMP706P/R/S/T/J, IMP708R/S/T/J
Electrical Characteristics (cont.)
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (IMP706P, IMP708R), 3.0V to 5.5V (IMP706/8S), 3.15V to 5.5V (IMP706/8T) and 4.1V to 5.5V (IMP706/8J).
Parameter
RESET Output Voltage IMP706P
Symbol
VOH VOL VOH VOL
Conditions
ISOURCE = 800A, 4.5V < VCC < 5.5V ISINK = 3.2mA, 4.5V < VCC < 5.5V ISOURCE = 500A, VRST (MAX) < VCC < 3.6V ISINK = 1.2mA, VRST (MAX) < VCC < 3.6V ISOURCE = 800A, 4.5V < VCC < 5.5V ISINK = 3.2mA, 4.5V < VCC < 5.5V ISOURCE = 500A, VRST (MAX) < VCC < 4.5V ISINK = 1.2mA, VRST (MAX) < VCC < 4.5V VCC = 3V (IMP706, P/R devices) VCC = 3.3V (IMP706, S/T devices) VCC = 4.4V (IMP706, J devices) VIL = 0.4V, VIH = 0.8VCC, VRST (MAX) < VCC < 4.5V VIL = 0.4V, VIH = 0.8VCC, 4.5V < VCC < 5.5V VCC = 5V VRST (MAX) < VCC < 4.5V WDI = VCC, IMP706 Only WDI = 0V, IMP706 Only
Min
VCC-1.5V
Typ
Max
0.4
Units
V
0.8VCC 0.3 VCC-1.5V 0.4 0.8VCC 0.3 1.0 1.6 2.25 s V
RESET Output Voltage, IMP708R/S/T/J
VOH VOL VOH VOL
Watchdog Timeout Period
tWD
WDI Pulse Width WDI Pulse Width WDI Input Threshold
tWP tWP VIH VIL VIH VIL
100 50 3.5 0.8 0.7VCC 0.6 50 -150 VCC-1.5V 0.4 0.8VCC 0.3 1.2 -25 1.25 0.01 1.3 25 -50 150
ns ns V
WDI Input Current WDI Input Current WDO Output Voltage VOH VOL VOH VOL PFI Input Threshold PFI Input Current PFO Output Voltage VOH VOL VOH VOL
A A V
ISOURCE = 800A, 4.5V < VCC < 5.5V ISINK = 1.2mA, 4.5V < VCC < 5.5V ISOURCE = 500A, VRST (MAX) < VCC < 4.5V ISINK = 500A, VRST (MAX) < VCC < 4.5V PFI falling. For P/R devices VCC = 3V. For S/T devices VCC = 3.3V. For J devices VCC = 4.4V. ISOURCE = 800A, 4.5V < VCC < 5.5V ISINK = 3.2mA, 4.5V < VCC < 5.5V ISOURCE = 500A, VRS (MAX) < VCC < 4.5V ISINK = 1.2mA, VRS (MAX) < VCC < 4.5V
V nA V
VCC-1.5V 0.4 0.8VCC 0.3
4
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(c) 1999 IMP, Inc.
IMP706P/R/S/T/J, IMP708R/S/T/J
Pin Descriptions
Pin Number IMP706P IMP706R/S/T/J IMP708R/S/T/J DIP/SO MicroSO DIP/SO MicroSO DIP/SO MicroSO Name
1 3 1 3 1 3 MR
2 3 4
4 5 6
2 3 4
4 5 6
2 3 4
4 5 6
VCC GND PFI
5
7
5
7
5
7
PFO
6
8
6
8
--
--
WDI
--
--
--
--
6
8
NC
--
--
7
1
7
1
RESET
8
2
8
2
--
--
WDO
7
1
--
--
8
2
RESET
Manual reset input. The active LOW input triggers a reset pulse. It is pulled HIGH by a 20k pull-up resistor. It is compatible with TTL/CMOS signals when VCC = 5V. It can be shorted to ground through a mechanical switch. Leave floating or connect to VCC if the function is not used. Monitored power supply input. Ground Power-fail input voltage monitor. With PFI less than 1.25V, PFO goes LOW. Connect PFI to ground when not used. Power-fail output. The output is active LOW and sinks current when PFI is less than 1.25V. If not used, leave the pin unconnected. Watchdog input. WDI controls the internal watchdog timer. A HIGH or LOW signal for 1.6 sec at WDI allows the internal timer to run-out, setting WDO low. A rising or falling edge must occur at WDI within 1.6 seconds or WDO goes LOW. The watchdog function is disabled by floating WDI. The internal watchdog timer clears when: RESET is asserted; WDI is three-stated; or WDI sees a rising or falling edge. Not connected. Active-LOW reset output. Pulses LOW for 200ms when triggered, and stays LOW whenever VCC is below the reset threshold. RESET remains LOW for 200ms after VCC rises above the RESET threshold or MR goes from HIGH to LOW. A watchdog timeout will not trigger RESET unless WDO is connected to MR. Watchdog output. WDO goes LOW when the 1.6 second internal watchdog timer times-out and does not go HIGH until a transition occurs at WDI. In addition, when VCC falls below the reset threshold, WDO goes LOW. Unlike RESET, WDO does not have a minimum pulse width and as soon as VCC exceeds the reset threshold, WDO becomes HIGH with no delay. Active-HIGH reset output. RESET is the inverse of RESET.
Function
Feature Summary
IMP706P IMP706R IMP706S IMP706T IMP706J IMP708R IMP708S IMP708T IMP708J Power-fail detector s s s s s s s s s Brownout detection s s s s s s s s s Debounced manual RESET input s s s s s s s s s Power-up/down RESET s s s s s s s s s Watchdog timer s s s s s Active-HIGH RESET s Active-LOW RESET s s s s Active-LOW and HIGH RESETs s s s s RESET threshold 2.63V 2.63V 2.93V 3.08V 4.00V 2.63V 2.93V 3.08V 4.00V
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IMP706P/R/S/T/J, IMP708R/S/T/J
Detail Descriptions
RESET/RESET Operation
The RESET/RESET signals are designed to start or return a P/C to a known state. With VCC above 1.2V, RESET and RESET are guaranteed to be asserted. During a power-up sequence, the reset outputs remain asserted until the supply rises above the threshold level. The resets are deasserted approximately 200ms after crossing the threshold. In a brownout situation where VCC falls below the threshold level, the reset outputs are asserted. If a brownout occurs during an already initiated reset period, the reset period will extend for an additional reset period of 200ms. The IMP708 devices have dual reset outputs, one active LOW and one active HIGH. The IMP706P has a single active HIGH reset and the IMP706/R/S/T/J devices have an active LOW reset output. width is 0.5s with a 3V VCC input and 0.15s with a 5V VCC input. If not used, tie MR to VCC or leave floating. By connecting the watchdog output (WDO) and MR, a watchdog timeout forces a RESET to be generated.
Watchdog Timer
A watchdog timer available on the IMP706P/R/S/T/J monitors P/C activity. If activity is not detected within 1.6 seconds on the Watchdog Input (WDI), the internal timer puts the Watchdog Output (WDO) into a LOW state. WDO will remain LOW until activity is detected at WDI. The watchdog function is disabled, meaning it is cleared and not counting, if WDI is floated or connected to a three-stated circuit. The watchdog timer is also disabled if RESET is asserted. When RESET becomes inactive and the WDI input sees a high or low transition as short as 100ns (VCC = 2.7V)/50ns (VCC = 4.5V), the watchdog timer will begin a 1.6 second countdown. Additional transitions at WDI will reset the watchdog timer and initiate a new countdown sequence. WDO will also become LOW and remain so, whenever the supply voltage, VCC, falls below the device threshold level. WDO goes HIGH as soon as VCC transitions above the threshold. There is no minimum pulse width for WDO as there is for the RESET outputs. If WDI is floated, WDO essentially acts as a low supply voltage output indicator.
IMP Part
IMP706P IMP706R IMP706S IMP706T IMP706J IMP708R IMP708S IMP708T IMP708J
RESET Polarity Threshold Watchdog Timer
HIGH LOW LOW LOW LOW Both: HIGH & LOW Both: HIGH & LOW Both: HIGH & LOW Both: HIGH & LOW 2.63V 2.63V 2.93V 3.08V 4.00V 2.63V 2.93V 3.08V 4.00V Yes Yes Yes Yes Yes No No No No
Power-failure detection with auxiliary comparator
All devices have an auxiliary comparator with 1.25V trip point. The output, PFO, is active LOW and the noninverting input is PFI. This comparator can be used as a supply voltage monitor with an external resistor voltage divider. As the monitored voltage level falls, PFI is reduced causing the PFO output to go LOW. Normally PFO interrupts the processor so the system can be shut down in a controlled manner.
Manual Reset (MR)
The active-LOW manual reset input is pulled high by an internal 20k pull-up resistor and can be driven low by CMOS/TTL logic or a mechanical switch to ground. An external debounce circuit is unnecessary since the 140ms minimum reset time will debounce mechanical pushbutton switches. The minimum MR input pulse
5V
VCC
0V
vRT tRS tRS
5V
5V
WDI
0V tWD tWP tWD
RESET
0V
5V 5V
MR
0V tWD
WDO
0V
MR externally set low tMD tMR
5V
5V
RESET
0V
WDO
RESET triggered by MR
706P_04.eps
0V
706P_05.eps
Watchdog Timing 6
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WDI Three-state operation
(c) 1999 IMP, Inc.
IMP706P/R/S/T/J, IMP708R/S/T/J
Application Information
Bi-directional Reset Pin Interfacing
The IMP706/8 can interface with P/C bi-directional reset pins by connecting a 4.7k resistor in series with the RESET output and the P/C bi-directional reset pin.
BUF Buffered RESET
Ensuring That RESET is Valid Down to VCC = 0V
When VCC falls below 1.2V, the IMP706R/S/T/J and IMP708R/S/T/J RESET reset outputs no longer pull down; it becomes indeterminate. To avoid the possibility that stray charges could build up and force RESET to the wrong state, a pull-down resistor should be connected to the RESET pin, thus draining such charges to ground. The resistor value is not critical. A 100k resistor will pull RESET to ground without loading it.
Monitoring Voltages Other Than VCC
VCC
Supply Voltage
IMP70x
4.7k RESET GND
Bi-directional I/O Pin (Example: 68HC11)
C or P RESET Input GND
The IMP706/708 can monitor voltages other than VCC using the Power Fail circuitry. If a resistive divider is connected from the voltage to be monitored to the PFI input, the PFO (output) will go LOW if the divider voltage goes below its 1.25V reference. Should hysteresis be desired, connect a resistor (equal to approximately 10 times the sum of the two resistors in the divider) between the PFI and PFO pins. A capacitor between PFI and GND will reduce circuit sensitivity to input high frequency noise. If it is desired to assert a reset in addition to the PFO flag, this may be achieved by connecting the PFO output to MR.
706P_06.eps
(c) 1999 IMP, Inc.
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7
IMP706P/R/S/T/J, IMP708R/S/T/J
Package Dimensions
Inches Min
A A1 A2 b C D e E E1 L a A A1 B C e E H L D A A1 A2 b b2 b3 D D1 E E1 e eA eB eC L
MicroSO (8-Pin)
a
Millimeters Max Min Max MicroSO (8-Pin)*
---- 1.10 0.050 0.15 0.75 0.95 0.25 0.40 0.13 0.23 2.90 3.10 0.65 BSC 4.90 BSC 2.90 3.10 0.40 0.70 0 6 1.35 0.10 0.33 0.19 1.27 0.157 0.244 0.050 0.197 0.210 ----- 0.195 0.022 0.070 0.045 0.400 ----- 0.325 0.280 ----- ----- 0.430 0.060 0.150 3.80 5.80 0.40 4.80 ---- 0.38 2.92 0.36 1.14 0.80 9.02 0.13 7.62 6.10 2.54 7.62 ----- 2.92 10.92 3.81
706P_t02.at3
----- 0.0433 0.0020 0.0059 0.0295 0.0374 0.0098 0.0157 0.0051 0.0091 0.1142 0.1220 0.0256 BSC 0.193 BSC 0.1142 0.1220 0.0157 0.0276 0 6
E1 E
+
L D A2 A e b A1
0.10mm 0.004in
C
D
MicroSO (8-Pin).eps
SO (8-Pin)**
0.053 0.004 0.013 0.007 0.050 0.150 0.228 0.016 0.189 ----- 0.015 0.115 0.014 0.045 0.030 0.355 0.005 0.300 0.240 0.100 0.300 ----- ----- 0.115 0.069 0.010 0.020 0.010 1.75 0.25 0.51 0.25 4.00 6.20 1.27 2.00 5.33 ----- 4.95 0.56 1.78 1.14 10.16 ----- 8.26 7.11
SO (8-Pin)
0- 8
L
E
H
Plastic DIP (8-Pin)***
C D A
e B A1
SO (8-Pin).eps
Plastic DIP (8-Pin)
D1
* JEDEC Drawing MO-187AA ** JEDEC Drawing MS-112AA *** JEDEC Drawing MS-001BA
E D A A2 E1
L A1 e b b2
0-15 C eA eB
Plastic DIP (8-Pin)a.eps
8
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(c) 1999 IMP, Inc.
IMP706P/R/S/T/J, IMP708R/S/T/J
IMP, Inc. Corporate Headquarters 2830 N. First Street San Jose, CA 95134-2071 Tel: 408-432-9100 Tel: 800-438-3722 Fax: 408-434-0335 Fax-on-Demand: 1-800-249-1614 (USA) Fax-on-Demand: 1-303-575-6156 (International) e-mail: info@impinc.com http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc. All other company and product names are trademarks of their respective owners. (c) 1999 IMP, Inc. Printed in USA Part No.: IMP706P Document Number: IMP706P-5-03/99

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